shakedown.social is one of the many independent Mastodon servers you can use to participate in the fediverse.
A community for live music fans with roots in the jam scene. Shakedown Social is run by a team of volunteers (led by @clifff and @sethadam1) and funded by donations.

Administered by:

Server stats:

263
active users

#risc

0 posts0 participants0 posts today

silly question:

how many instructions and registers would a minimal RISC be?

load, store, move, add, sub, nop, jump, beq, blt, and, or, xor, not, shift left, shift right, mul, div, rem, min, max, call, ret, sys, int?

general purpose, return addr, stack pointer, func args(x?), saved registers(x?),

maaaybe a time register and identity register, an interrupt masks register that can only be written by a privileged process... so a ring register?

Angelina Jolie Was Right About Computers | WIRED

「 China’s top scientists have heralded RISC-V as a path to silicon independence. India just used RISC-V to make its first homemade microprocessor. Name a country; it’s probably experimenting with RISC-V. Brazil sent a record 25 delegates to the RISC-V summit 」

wired.com/story/angelina-jolie

WIRED · RISC Architecture Really Did Change EverythingBy Jason Kehe
Replied in thread

@cstross Wow! This is a great example of the power of virtual platforms, #emulators, and also disciplined state control in a programming language. The fact that you can run this inside a #pdf is also instructive — yet another attack vector.
Also, I’ll bet there are many packages out there to do cross-compilation from #RISC-V to other machines. Remind me never to use Adobe Acrobat.

Replied in thread

@koakuma @techokami also #UltraSparcT2 as cool as it was at release (including dual 10Gbit-NICs and hardware RNG on die) has a lot of things noone would want to deal with in 2024 (i.e. DDR2-FBDIMMs).

  • Plus #RISCv unlike #SPARCv9 amd #OpenPOWER was designed on a clean slate in academia by people who had dealt with #RISC & #CISC architectures and needed something #OpenSource as they can't just violate NDAs nilly-willy for teaching.

Pretty shure @stman could write an entire curriculum on why #SPARC, #PowerPC, #s390x and even #ARM / #ARM64 should not be pursued and why #mc68k died alongside the unfixable-by-design mess that is #ix86 & #amd64.

  • Plus RISCv's ISA has been an #OpenStandard from the get go, whereas the efforts by #Oracle nee #Sun and #IBM were mostly done in reaction to it and to keep the few invested licensees and co-designers onboard and not drop the platform entirely...

Look, I'd love to get my hands on some Sun SPARC Hardware but aside from making my room hot and noisy there isn't much to justify blowing likely over half a Euro per hour (electricity price: € 0,40/kWh) just to have it up and running, as compared to a #PiCluster like those @geerlingguy had built multiple times are more practical.

  • For comparison: It's like driving a 2011 Ford CVPI-71 with a 11,9l SONNY'S SAR-729 engine for commuting from Leverkusen to Köln when there's ample of affordable, reliable and fast public transport that gets me faster from Opladen to Deutz than it takes to drive up the 15th deck of a parking garage just to find a spot to park that 5,7m long street yacht where one can climb out of it from the doors and not the trunk!

And that's just bottom-billing, low-cost ARM SoC tech designed for a price tag (to the point that until the #Pi5 they neither included a power button nor #RTC onboard!

  • OFC RISC-V is still 5-25+ years behind #ARMv9 solely based off #patents, #budget and #PersonnelHours invested in it, so it's barely getting on-par with 10-20yr old ARM devices in terms.of power and support.